| Beitragsrückblick für SiSoftware Sandra 2021 (die neuesten Beiträge zuerst) |
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Erstellt: 11:20 am 1. Nov. 2023 |
SiSoftware Sandra R26 31.137 wurde gerade veröffentlicht und kann nun von unserem Server heruntergeladen werden 
- Hardware Support
Resolved detection issues with Intels 14th Gen Core RaptorLake-Refresh e.g. 14700KF
Resolved reporting issues with AMDs Gen4 Ryzen e.g. 7950X-3D
- Software Support
Resolved detection issues with tiered Storage Pools e.g. Windows Storage Spaces
Updated Official Ranker API for greater reliability
- Windows Defender Core Isolation features and Sandras Kernel Driver
Sandra is compatible with most Core Isolation” security features and you can have those enabled:
Memory Integrity – Compatible, can enable
Memory Access Protection – Compatible, can enable
Microsoft Vulnerable Driver Blocklist – Kernel driver compatible
Kernel-mode Hardware-enforced Stack Protection – Kernel driver not compatible, but software will still run with reduced functionality
- Kernel-mode Hardware-enforced Stack Protection and Sandras Kernel Driver
When running Sandra on recent Windows 11 versions and hardware you may receive a pop-up stating that Sandra.sys aka the kernel driver cannot be loaded on this device due to a security feature called Hardware-enforced Stack Protection. Microsoft has started to ask Windows users to enable this new security features that may not be compatible with Sandra’s kernel driver Sandra.sys. As this driver must run in kernel space and directly interacts with hardware – as with most other hardware utilities of this type, e.g. game anti-cheats, anti-virus/malware and similar kernel-level software – it cannot be compatible with all features. While we are working on finding a solution, unfortunately there is no easy or immediate fix for it. While most of the features will still work without the kernel device driver – its hardware detection functionality is greatly reduced, e.g. CPU/Chipset/Memory data will not be available e.g. CPU multipliers, memory controller timings, memory modules detection, etc.. You can still run the benchmarks. For full Sandra functionality, you will need to disable this feature and perhaps re-enable it later if all your other software is compatible with it. While we are working on a solution, unfortunately there is no immediate/easy work-around or fix.
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Erstellt: 10:52 am 6. Aug. 2023 |
SiSoftware Sandra R25 31.133 wurde gerade veröffentlicht und kann nun von unserem Server heruntergeladen werden
- CPU Multi-Media Benchmarks
AVX-iFMA(52): New 256-bit code path based on AVX512-iFMA(52) 512-bit for future arch (e.g. Meteor Lake MTL, Arrow Lake ARL). We saw +66% improvement as detailed in our AVX512-iFMA(52) Improvement for IceLake & TigerLake article.
AVX512-FP16: New code path for Xeon processors that support AVX512-FP16. We expect +90% improvement over FP32 if precision loss in acceptable (e.g. zoomed out fractals).
Note: Future FP16 code-paths will also be added to the other CPU benchmarks, however some parts may remain FP32 as the loss of precision would make the results useless. We have explored this in our GP-GPU article dealing with FP16 support: FP16 GP-GPU Image Processing Performance & Quality.
- CPU Cryptogaphy Benchmarks
SHA2-512 HWA: Hardware-accelerated hashing SHA512 code-path – based on current SHA2-256 HWA. We expect ~3x (three times) better performance based on the SHA2 non-accelerated/HWA results.
Future SM3-256 (China) HWA: Hardware-accelerated hashing SM3 code-path (China's version of SHA hashing functions). We expect similar performance improvement to SHA HWA.
Future SM4-128/256 (China) HWA: Hardware-accelerated block crypto SM4 code-path (China's version of AES block crypto functions). We expect similar performance improvement to AES HWA.
Note: We will default to SM4 + SM3 benchmarks – rather than AES + SHA for both CPU & GP-GPU Cryptography benchmarks when China locale is detected as these algorithms are more likely to be used there.
- All CPU Benchmarks – AVX10 Support
AVX10.2+ 256-bit future code paths (FP32, FP64 and FP16) for Hybrid architectures (e.g. Meteor Lake MTL, Arrow Lake ARL). Note both Core (P) and Atom (E) will run the same 256-bit width binary and not different widths
AVX10.1+ 512-bit & AVX512 shared code path (FP32, FP64 and FP16) for Xeon architectures
Possible AVX10.2+ 128-bit future code path for Atom/Other discrete architectures if required
- Hardware Support
Intel 14th gen Hybrid Raptor Lake Refresh RPL-S support
Intel future gen Hybrid Meteor Lake (MTL-S/M/P/N), Arrow Lake (ARL-S/U), Lunar Lake (LNL-M) detection
Intel future gen Xeon Granite Rapids SP/D detection
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Erstellt: 13:59 am 1. März 2023 |
SiSoftware Sandra 31.117 mit AMD X3D Unterstützung wurde online gestellt und kann nun von unserem Server heruntergeladen werden
- CPU / Platform Detection
Additional Intel Core 13 (RaptorLake) H/P/U-Series support
Preliminary AMD Ryzen 3D V-Cache/L3 (7950X-3D, 7900X-3D, 7800X-3D etc) support
- GP-GPU Benchmarks
Updated CUDA SDK
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Erstellt: 7:05 am 16. Dez. 2022 |
SiSoftware Sandra 31.115 wurde online gestellt und kann nun von unserem Server heruntergeladen werden
- Benchmarks, Hardware Support updates and fixes
GP-GPU – CUDA
Updated to CUDA 11.8
Support for 8.9/9.0 devices
nVidia 4090 series FP16 validation failure (too low precision for image size)
GP-GPU Memory Bandwidth
Corrected DirectX Compute (11/12) bandwidths with internal graphics
Memory Detection
Intel XMP 3.0, AMD EXPO DDR5 detection missing in some instances
Jedec, Intel XMP 2.0 DDR4 write timings if provided by newer standard revision
Corrected timings (tRP, tRAS) for some Intel ADL/RPL systems
Missing memory timings for some mobile Intel ADP-P/U systems
Added support for more chipsets (both AMD and Intel)
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Erstellt: 9:45 am 19. Okt. 2022 |
SiSoftware Sandra 2021 31.109 wurde online gestellt und kann nun von unserem Server heruntergeladen werden
- Benchmarks, Hardware Support updates and fixes
Cluster Bandwidth Contribution: All Cache/Memory Benchmarks
It is the sum of the bandwidth of all cores in each cluster (%)
Reveals how much the big/P & LITTLE/E core clusters have contributed compute power wise to each benchmark score in percent: e.g. on Intel 12600K - Memory Bandwidth Benchmark:
60% big/P Cluster - 40% LITTLE/E Atom cluster
Core Bandwidth Ratio: All Cache/Memory Benchmarks
It is the ratio of the big/P Core vs. LITTLE/E core bandwidth (ratio)
Reveals just how much more performant the big/P Cores are vs. the LITTLE/E cores.
2.15x big/P Core - 1.x LITTLE/E Atom core
- Additional Hardware Support
Additional AMD Ryzen 7000 (Zen4) support
Enabled DDR5 SPD (Hub, PMIC, TS) AMD information
Additional Intel Sapphire Rapids (SRP-X/EX) support
Enabled DDR5 SPD (Hub, PMIC, TS) Intel information
- Example of performance contribution/ratio on Intel Core i5 12600K (ADL):
Cluster Bandwidth Contribution (per Cluster type)
Integer Memory Bandwidth : 64% big Cores Cluster – 32% LITTLE cores Cluster
Float Memory Bandwidth : 65% big Cores Cluster – 32% LITTLE cores Cluster
L1D (1st Level) Data Cache Bandwidth : 78% big Cores Cluster – 18% LITTLE cores Cluster
L2 (2nd Level) Unified/Data Cache Bandwidth : 89% big Cores Cluster – 7% LITTLE cores Cluster
L3 (3rd Level) Unified/Data Cache Bandwidth : 90% big Cores Cluster – 7% LITTLE cores Cluster
Note: Here we sum the memory bandwidth performance contribution for all cores in the type of cluster.
Note2: This feature also works on Arm64 big.LITTLE / DynamicQ SoCs, it is not tied to x86 Intel hybrid systems.
Cluster Bandwidth Ratio (per core type)
Integer Memory Bandwidth : 1.3x big-Core – 1.0x LITTLE-core
Float Memory Bandwidth : 1.4x big-Core – 1.0x LITTLE-core
L1D (1st Level) Data Cache Bandwidth : 2.9x big-Core – 1.0x LITTLE-core
L2 (2nd Level) Unified/Data Cache Bandwidth : 8.5x big-Core – 1.0x LITTLE-core
L3 (3rd Level) Unified/Data Cache Bandwidth : 8.6x big-Core – 1.0x LITTLE-core
Note: Here we divide the cluster performance contribution by the number of cores in each cluster – and then work out the big/LITTLE ratio. If SMT is enabled or not, we still only count the number of cores per cluster, not threads.
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Erstellt: 7:30 am 7. Sep. 2022 |
SiSoftware Sandra 2021 31.104 wurde online gestellt und kann nun von unserem Server heruntergeladen werden
- Benchmarks, Hardware Support updates and fixes
Parallelism: All CPU/Memory Benchmarks
Additional Multi-Threaded big/P Cores Only aka only using threads running on big/P cores (SMT)
Note that as (current) LITTLE/E Atom cores do not support SMT, there is no corresponding option for them yet
Cache & Memory Bandwidth Benchmark
Improved/fixed hybrid bandwidth workload allocation when all cores types are used; e.g. on Intel 12600K:
Memory Bandwidth Improvement: 49GB/s to 56GB/s: +14% improvement (float AVX2/buffered)
L1D Cache Bandwidth – not affected/improvement
L2 Caches Bandwidth fix: 145GB/s to 836GB/s
L3 Cache Bandwidth fix: 56GB/s to 452GB/s
Cluster Performance Contribution: All CPU/Memory Benchmarks
It is the sum of the performance of all cores in each cluster (%)
Reveals how much the big/P & LITTLE/E core clusters have contributed compute power wise to each benchmark score in percent: e.g. on Intel 12600K - CPU Arithmetic Benchmark:
80% big/P Cluster - 20% LITTLE/E Atom cluster
Core Performance Ratio: All CPU/Memory Benchmarks
It is the ratio of the big/P Core vs. LITTLE/E core performance (ratio)
Reveals just how much more performant the big/P Cores are vs. the LITTLE/E cores.
2.15x big/P Core - 1.x LITTLE/E Atom core
- Future Hardware Support
Additional AMD Ryzen 7000 (Zen4) support
Enabled DDR5 SPD (Hub, PMIC, TS) AMD information
Additional Intel Sapphire Rapids (SRP-X/EX) support
Enabled DDR5 SPD (Hub, PMIC, TS) Intel information
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Erstellt: 9:13 am 24. Juli 2022 |
SiSoftware Sandra 2021 31.98 R15 wurde online gestellt und kann nun von unserem Server heruntergeladen werden
CUDA GP-GPU Benchmarks
- Updated to CUDA SDK 11.8 with nVidia Ada support GeForce RTX 4090, et.]
Memory Bandwidth Benchmark
- 3-5% bandwidth increase due to L1D block/prefetch optimisations e.g. AVX512 AMD Zen4, Intel ICL-SP, future arch.
Memory Latency Benchmark
- "In-Page Random" memory access latency pattern – additional TLB ranges randomisation in addition to the randomisation within each TLB range. Credit Rob Williams @ TechGage – many thanks!
Benchmark now fails (does not run at all) if TLB information cannot be detected, e.g. CPU does not report it.
This change affects both Data and Code latencies.
- Note that the other tests "Full Random" and "Sequential" memory access patterns – are *not* affected – as the pattern is not affected by TLB data.
- It is always recommended to use "2MB/large" pages rather than "4kB/normal" pages in order to minimise "TLB miss" penalties which is the reason for the “in-page random” test. Please see How to enable large/huge memory pages in Windows.
Cryptography Benchmark
- 3-5% bandwidth increase due to L1D block/prefetch optimisations e.g. AVX512-VAES AMD Zen4, Intel ICL-SP, future arch.
Client (GUI)
- Light/Dark-mode colour optimisations
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Erstellt: 6:44 am 5. Juli 2022 |
SiSoftware Sandra 2021 31.97 R14c wurde online gestellt und kann nun von unserem Server heruntergeladen werden
Memory Latency Benchmark
- "In-Page Random" memory access latency pattern – TLB range fix – that resulted in too-low memory score (latency) to be reported on modern Intel systems (e.g. AlderLake with large L3 cache).
- Better random number generator (2^32 vs. 2^15 states) in order to defeat any possible access pattern detection by the CPU.
- Note that the other tests "Full Random" and "Sequential" memory access patterns – arenot- affected - as the pattern is not affected by TLB data.
- It is always recommended to use "2MB/large" pages rather than "4kB/normal" pages in order to minimise TLB miss penalties which is the reason for the "in-page random" test.
- Reverted to testing latencies of all cores thus "Multi-Core" rather than just 1 thread/core "Single-Core" so that on hybrid systems (AlderLake, RaptorLake, etc.) the average/overall latency does not favour just to Big/P cores. This does increase run-time of test proportional with number of cores.
Memory Bandwidth Benchmark
- Increased buffer sizes for modern processors to match L1D cache size
Cryptography Benchmark
- fixed HWA code paths (AES, SHA) not engaging R13x regression
Hardware
- Resolved L2, L3, L4 caches counts detection R13x regression
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Erstellt: 14:06 am 14. Juni 2022 |
SiSoftware Sandra 2021 31.93 R14 wurde online gestellt und kann nun von unserem Server heruntergeladen werden
- Hardware
Resolved L2 & L3 cache count detection [R13x regression]
- Client (GUI)
Light/Dark-mode font optimisations
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Erstellt: 7:32 am 19. Mai 2022 |
SiSoftware Sandra 2021 31.88 R13 wurde online gestellt und kann nun von unserem Server heruntergeladen werden
- Hardware
Intel 4th gen Intel Xeon Sapphire Rapids ADL-SP AVX512+ support
Intel 3rd gen Intel Xeon Whitley Ice Lake ICL-SP AVX512+ support
AMD Ryzen 6000 Mobile platform
Future hardware support
- Benchmarks
Memory Bandwidth Benchmark: fixed failure with multiple cores/threads CPUs e.g. ICL-SP
Cache Bandwidth Benchmark: fixed failure with multiple cores/threads CPUs e.g. ICL-SP
- Client GUI
Light/Dark-mode font optimisations
Icon dynamic colour customisation
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